PLL APPLICATION NOTE
To phase lock the 1050 signal source, approximately 25 microwatts of RF power is coupled to the INPUT of the 3010 Prescaler. The 1050 output frequency is scaled first by the 3010 Prescaler reducing a 950 MHz signal to 95 MHz and then scaled again (F/N) by a 54/74S TTL divider. If N = 100, the frequency at the phase detector will be 950 KHz which can be processed by most commonly available phase detectors. If the output of the CD4527 BCD Rate Multipliers is 950 KHZ, the loop will lock when the error voltage produced by the phase detector forces the phase of the 1050 source divided by 10N to match the output of the BCD Rate Multiplier.
APPLICATION NOTE LIST